//==========================================================================
// Copyright (c) 2000-2008,  Elastos, Inc.  All Rights Reserved.
//==========================================================================
#ifndef __TIMERBITS_H__
#define __TIMERBITS_H__

/* Copyright 2000-2002 Intel Corp. */

/*++

Module Name: timerbits.h

Abstract:
 Contains bit manipulation macros to OST and RTC registers

--*/

#include "xllp_ost.h"
#include "xllp_rtc.h"

//
// RTC macros
//
// Clear any current RTC alarm interrupt
//
#define RT_ALARM_INT_CLR(pRTSR) (pRTSR &= (~(XLLP_RTSR_MASK | XLLP_RTSR_RESERVED_BITS) | XLLP_RTSR_AL))

// Clear any current RTC 1Hz edge detect interrupt (write to clear)
#define RT_HZ_INT_CLR(pRTSR) (pRTSR &= (~(XLLP_RTSR_MASK | XLLP_RTSR_RESERVED_BITS) | XLLP_RTSR_HZ))

// Enable/Disable the RTC alarm interrupt
#define RT_ALARM_INT_EN(pRTSR)  (pRTSR = (pRTSR & ~(XLLP_RTSR_MASK | XLLP_RTSR_RESERVED_BITS)) | XLLP_RTSR_ALE)
#define RT_ALARM_INT_DIS(pRTSR) (pRTSR &= (~(XLLP_RTSR_MASK | XLLP_RTSR_RESERVED_BITS | XLLP_RTSR_ALE)))

// Enable/Disable any current RTC 1Hz edge detect interrupt
#define RT_HZ_INT_EN(pRTSR)    (pRTSR = (pRTSR & ~(XLLP_RTSR_MASK | XLLP_RTSR_RESERVED_BITS)) | XLLP_RTSR_HZE)
#define RT_HZ_INT_DIS(pRTSR)   (pRTSR &= (~(XLLP_RTSR_MASK | XLLP_RTSR_RESERVED_BITS | XLLP_RTSR_HZE)))

//
// OST macros
//
// OSSR bits are all sticky (write one to clear)
// Optimize macro with assignment, instead of ANDing)
//
#define TIMER_M0_INT_CLR(pOSSR) (pOSSR = XLLP_OSSR_M0)
#define TIMER_M1_INT_CLR(pOSSR) (pOSSR = XLLP_OSSR_M1)
#define TIMER_M2_INT_CLR(pOSSR) (pOSSR = XLLP_OSSR_M2)
#define TIMER_M3_INT_CLR(pOSSR) (pOSSR = XLLP_OSSR_M3)
#define TIMER_M4_INT_CLR(pOSSR) (pOSSR = XLLP_OSSR_M4)
#define TIMER_M5_INT_CLR(pOSSR) (pOSSR = XLLP_OSSR_M5)
#define TIMER_M6_INT_CLR(pOSSR) (pOSSR = XLLP_OSSR_M6)
#define TIMER_M7_INT_CLR(pOSSR) (pOSSR = XLLP_OSSR_M7)
#define TIMER_M8_INT_CLR(pOSSR) (pOSSR = XLLP_OSSR_M8)
#define TIMER_M9_INT_CLR(pOSSR) (pOSSR = XLLP_OSSR_M9)
#define TIMER_M10_INT_CLR(pOSSR) (pOSSR = XLLP_OSSR_M10)
#define TIMER_M11_INT_CLR(pOSSR) (pOSSR = XLLP_OSSR_M11)

//
// OIER macros for Match Registers (0-7, 10-11)
// (8-9 are being reserved for possible xllp timer delay use)
//
#define TIMER_M0_INT_EN(pOIER)  (pOIER |= XLLP_OIER_E0)
#define TIMER_M0_INT_DIS(pOIER) (pOIER &= ~(XLLP_OIER_RESERVED_BITS | XLLP_OIER_E0))

#define TIMER_M1_INT_EN(pOIER)  (pOIER |= XLLP_OIER_E1)
#define TIMER_M1_INT_DIS(pOIER) (pOIER &= ~(XLLP_OIER_RESERVED_BITS | XLLP_OIER_E1))

#define TIMER_M2_INT_EN(pOIER)  (pOIER |= XLLP_OIER_E2)
#define TIMER_M2_INT_DIS(pOIER) (pOIER &= ~(XLLP_OIER_RESERVED_BITS | XLLP_OIER_E2))

#define TIMER_M3_INT_EN(pOIER)  (pOIER |= XLLP_OIER_E3)
#define TIMER_M3_INT_DIS(pOIER) (pOIER &= ~(XLLP_OIER_RESERVED_BITS | XLLP_OIER_E3))

#define TIMER_M4_INT_EN(pOIER)  (pOIER |= XLLP_OIER_E4)
#define TIMER_M4_INT_DIS(pOIER) (pOIER &= ~(XLLP_OIER_RESERVED_BITS | XLLP_OIER_E4))

#define TIMER_M5_INT_EN(pOIER)  (pOIER |= XLLP_OIER_E5)
#define TIMER_M5_INT_DIS(pOIER) (pOIER &= ~(XLLP_OIER_RESERVED_BITS | XLLP_OIER_E5))

#define TIMER_M6_INT_EN(pOIER)  (pOIER |= XLLP_OIER_E6)
#define TIMER_M6_INT_DIS(pOIER) (pOIER &= ~(XLLP_OIER_RESERVED_BITS | XLLP_OIER_E6))

#define TIMER_M7_INT_EN(pOIER)  (pOIER |= XLLP_OIER_E7)
#define TIMER_M7_INT_DIS(pOIER) (pOIER &= ~(XLLP_OIER_RESERVED_BITS | XLLP_OIER_E7))

#define TIMER_M10_INT_EN(pOIER)  (pOIER |= XLLP_OIER_E10)
#define TIMER_M10_INT_DIS(pOIER) (pOIER &= ~(XLLP_OIER_RESERVED_BITS | XLLP_OIER_E10))

#define TIMER_M11_INT_EN(pOIER)  (pOIER |= XLLP_OIER_E11)
#define TIMER_M11_INT_DIS(pOIER) (pOIER &= ~(XLLP_OIER_RESERVED_BITS | XLLP_OIER_E11))


#endif


